A Data-Driven Admittance Model for Infrastructure Loads: Why GPU Load Modeling is Becoming a Grid Planning Priority

As AI training clusters scale into the hundreds of megawatts, utilities and ISOs are confronting a load category that conventional planning tools weren't built to represent. In a new technical paper co-authored with experts at the National Laboratory of the Rockies, Kevin Chen and Billy Yancey of EPE recently addressed this with a measurement-based approach to modeling the electrical signature of Graphics Processing Unit (GPU) compute racks.

The power demanded by data centers housing AI workloads varies rapidly based on the computational intensity of the tasks executed by the GPUs running these workloads. Load modeling has become an important part of data center design and evaluation, used in domains from planning to operations.

GPU modeling resists conventional approaches for four reasons:

• The internal dynamics of the GPU are hard to model from first principles and change with the task being executed.
• GPUs are powered through a cascaded interconnection of power-electronics-based power-conditioning units with nonlinear dynamic
• Empirical observations show the time-varying nature of the load.
• GPU loads are inherently unbalanced.

There is also a gap in current practice worth noting: existing models relate the phase of computation to power consumption but tend to consider three-phase power in aggregate and discard the inherently unbalanced nature of the load, leaving the voltage-current relationship unexplored. That relationship, called admittance, is the focus of this work.

The Approach: Admittance as a Measurable, Simulation-Ready Model

Rather than modeling the GPU's internal power electronics from first principles, this work takes a data-driven route: admittance is developed via spectral analysis on measured voltage and current, creating a model that is linear time-invariant, easily implementable in simulations, and requires no online parameter storage.

The formulation preserves phase imbalance rather than averaging it away: discarding coupling between phases, the admittance is modeled as a 3×3 diagonal matrix, with phases considered separately given that GPU loads are inherently unbalanced. This yields three independent single-input, single-output identification problems rather than one aggregate model.

A key simplification follows from the power-conditioning hardware itself: due to the ubiquitous presence of power factor correction circuits in GPUs, the voltage and current are in phase, displaying a resistive behavior of the GPU load and letting the admittance magnitude spectrum be treated as dominantly resistive.

Two Admittance Model Variants: Capturing a Moving Target

Because workload intensity shifts continuously, two versions of the model are derived from the same measurement stream: a 1-cycle model, based on the 1-cycle measurements of voltage and current for the lowest-order snapshot, and an N-cycle model (nine consecutive cycles here), which resolves finer frequency structure at the cost of absorbing workload drift across the window.

The pipeline follows five steps:

1. Extract frequency content via FFT.

2. Form an admittance spectrum as the bin-wise ratio of current to voltage magnitude.

3, Fit a narrowband resonant transfer-function section to each retained bin, where a specific transfer function evaluates a prescribed gain and zero phase angle at a chosen frequency, and is approximately zero elsewhere.

4. Sum those sections into a parallel bank per phase.

5. Reduce order by thresholding out insignificant bins based on separate voltage and current magnitude thresholds.

Measurement Campaign: Real Workload, Real Rack

The model was built and validated against field data from an operating HPC facility, not synthetic signals.

• Measurement boundary: Data were collected at the 480-V three-phase panelboard branch circuit, feeding one rack power distribution unit of a GPU compute rack (the rack/Power Distribution Unit (PDU) feeder, not the facility-level point of common coupling).
• Load composition: The admittance aggregates the rack PDU, node AC-DC power supplies, downstream DC-DC stages, and all node loads. GPUs are the dominant consumers under load. Cooling is separately fed and excluded.
• Hardware: The instrumented rack hosts 10 nodes, each comprising a dual-socket 64-core AMD EPYC Genoa processor and four NVIDIA H100 SXM (80 GB) GPUs, for a total of 40 GPUs per rack.
• Data acquisition: A three-phase power-monitoring terminal sampled three voltages and three currents simultaneously at 10 kHz per channel behind a hardware anti-aliasing filter, with the pipeline remaining stable for more than six months of continuous recording.
• Workload: The reported interval captures an MLPerf Training Llama 3.1 8B pretraining global-batch-size sweep on the full rack, using NeMo with tensor parallelism of 4 and data parallelism of 10.

What the Data Shows

• Admittance rises with harmonic order. The supply voltage is close to a pure 60 Hz tone, while the current spectrum carries substantial harmonic content, producing an admittance magnitude that grows well above its fundamental-frequency value at harmonic bins. This is consistent with a resistive, rectifier-type front end.
• 1-cycle vs. 9-cycle models agree at the harmonics but diverge between them. The resonant peaks of both models agree at integer multiples of the fundamental frequency. However, additional resonant peaks appear in the N-cycle model because it considers nine cycles of measurement during which the frequency content of the signals varies.
• Time-domain validation confirms model fidelity, with quantified error. Applying measured voltage to each model and comparing the resulting current against measurement, the one-cycle model produced per-phase RMSE of 11.45 A, 17.56 A, and 12.55 A, and MAE of 10.12 A, 14.05 A, and 10.36 A for phases a, b, and c respectively.
• The load's spectral content genuinely drifts within the window. The fundamental-frequency magnitude of the phase-a current varies between roughly 76.4 A and 81.5 A over a 10-cycle window. This confirms that the inter-harmonic peaks in the 9-cycle model reflect real workload-driven fluctuation. This time-varying nature does not imply that the physical structure is changing, but that the workload power demand is.

What Could an Admittance Model Mean for Large Load Projects?

For teams supporting data center interconnection studies, GI/SIS work, or large-load planning submittals, this measurement-grounded, EMT-ready load representation addresses a real gap. Most present-day data center load models used in interconnection studies still rely on aggregate, balanced power assumptions that this work shows may understate both harmonic content and phase imbalance.

It's worth being transparent about current limitations: the model is time-invariant by construction even though the underlying load is not, a contribution that grows with window length. Planned extensions include additional benchmark cases with temperature and workload-type data, deployment in a commercial EMT tool with performance reporting on unseen workloads, exploration of linear time-periodic and harmonic-state-space approaches, and eventual study of data center grid interaction as an unbalanced load.

Partner with EPE on Next-Generation Data Center Load Modeling

As AI-driven load growth continues to reshape interconnection queues, capacity planning, and grid reliability studies nationwide, measurement-based approaches like this admittance model represent a meaningful step toward more accurate representation of GPU infrastructure.

EPE's power systems engineers are actively tracking these developments and applying rigorous, field-validated modeling techniques to help clients navigate the unique technical and regulatory challenges that data center and large-load interconnections present. To start the conversation, reach out to our team of data center and power systems experts using the form below.